620 / 2019-03-26 16:35:08
A Strategy of DC Fault Ride Through and capacitor voltage balancing for Hybrid Modular Multilevel Converter (MMC)
hybrid MMC, fault-through capability, negative-level output, capacitor voltage balancing
终稿
Xinyue Zhang / Xi'an Jiaotong University
Xiaoning Kang / Xi'an Jiaotong University
Yagang Zhang / Xi'an Jiaotong University
The structure of hybrid modular multilevel converter (MMC) combines half-bridge submodule (HBSM)s and full-bridge submodule (FBSM)s. Compared with half-bridge MMC, the hybrid topology has fault-through capability against a solid DC side fault. In contrast with full-bridge MMC, the topology saves a large amount of cost and power loss since it reduces the number of diodes and IGBTs a lot. This paper proposes an operation mode that a part of FBSMs’ outputs are positive while others’ outputs are negative. The mode is more flexible and it takes advantage of negative-level output of FBSMs which can expand the range of AC output voltage and make MMC run in loss-reduction mode. The topology maintains DC fault clearing capability only under the condition of a certain proportion of HBSMs and FBSMs. In this paper, the proportion of HBSMs and FBSMs is calculated and a new capacitor voltage balancing strategy is proposed in order to save the sort time. By building a 21-level hybrid MMC model in PSCAD/EMTDC, the simulation results demonstrate the validity of the proposed control scheme.
重要日期
  • 会议日期

    10月21日

    2019

    10月24日

    2019

  • 10月13日 2019

    摘要录用通知日期

  • 10月13日 2019

    初稿截稿日期

  • 10月14日 2019

    初稿录用通知日期

  • 10月24日 2019

    注册截止日期

  • 10月29日 2019

    终稿截稿日期

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