39 / 2023-09-28 01:40:45

Single-Phase Transformerless Two-Leg UPQC with Low DC-Link Voltage and Reduced

Power Quality;,Unified Power Quality Conditioner;,Shared Bridge;,Low DC-Link Voltage;,Capacitor Voltage Ripple Suppression

2.Power electronic technology and application > (1)、Power converter topologies and design

This paper introduces a single-phase transformerless unified power quality conditioner (UPQC) with two bridge arms. In contrast to traditional half-bridge UPQC, this system is comprised of a H-bridge active power filter (APF) and a half-bridge dynamic voltage restorer (DVR) coupled through a shared bridge arm. It can operate at low dc-link voltage during undervoltage and overvoltage conditions in the power supply, and is unaffected by the series converter compensation strategy. Additionally, an equivalent current model is employed to calculate the dc-link capacitor voltage expression. The results indicate that the voltage capacitor ripple of two-leg UPQC is reduced, leading to approximately one-third less capacitor requirement under equivalent load conditions. Finally, simulations confirm the accuracy of the ripple analysis and demonstrate the feasibility of the proposed topology.This paper introduces a single-phase transformerless unified power quality conditioner (UPQC) with two bridge arms. In contrast to traditional half-bridge UPQC, this system is comprised of a H-bridge active power filter (APF) and a half-bridge dynamic voltage restorer (DVR) coupled through a shared bridge arm. It can operate at low dc-link voltage during undervoltage and overvoltage conditions in the power supply, and is unaffected by the series converter compensation strategy. Additionally, an equivalent current model is employed to calculate the dc-link capacitor voltage expression. The results indicate that the voltage capacitor ripple of two-leg UPQC is reduced, leading to approximately one-third less capacitor requirement under equivalent load conditions. Finally, simulations confirm the accuracy of the ripple analysis and demonstrate the feasibility of the proposed topology.