摘要详情

ID / 提交时间

48 / 2023-08-30 00:19:48

标题

A Novel FPGA-Based Delay-Line Implementation and Interpolation Method Using TDCs

关键字

calibration algorithm,delay line,FPGA system,time digital convertor (TDC),time interpolation,time measurement

主题及专题

Special Sessions > SS19 - Artificial Intelligence for Sensor Data analytics

状态

终稿

作者

Xinyue Sun / Nankai University;College of Electronic Information and Optical Engineering

Yuchen Shi / Nankai University;College of Electronic Information and Optical Engineering

Jiawei Li / Nankai University；College of Electronic Information and Optical Engineering

Yichen Ren / Nankai University;College of Electronic Information and Optical Engineering

Ergang Zhao / Nankai University；College of Electronic Information and Optical Engineering

Zhao Yue / Department of Microelectronics； Nankai University

摘要

Precision time digital converter (i.e., TDC) is a crucial technique for sensing and detecting and is frequently employed in a variety of contexts, including inertial navigation, aviation, space physics, and optical fiber communication. However, the implementation of a stable and uniform delay line and the accurate time interpolation are frequent trouble in the implementation process but are hardly ever analyzed as a whole. In order to develop a full and exact system, this manuscript examines the two primary issues and offers practical solutions. The system is tested in the low-cost FPGA of the Altera Cyclone IV series. According to the test results, the precision TDC system performs admirably, with an RMS accuracy of approximately 18.54 ps.