41 / 2024-08-14 22:30:27

Multi-DAC Based on Improved RANSAC Algorithm Relative Time Delay Measurement

FI-DAC, relative time delay, RANSAC, linear estimation, linear phase representation

Frequency interleaved digital-to-analog converter (FI-DAC) is a multi-DAC parallel technology that can break the bandwidth limitation of a single DAC. One of the critical factors that affects the quality of the reconstructed signal in FI-DAC is the relative time delay between sub-channels. This relative time delay is related to the phase behavior of the signal, which is typically manifested through the linear phase-frequency response of the reconstructed signal. At present, the relative time delay estimation using the phases of several single-frequency signals is an attractive idea. However, the presence of nonlinear phase errors in FI-DAC systems significantly impacts the reliability of such estimation. To address this issue, a linear phase estimation method is proposed, which is based on the improved Random Sample Consensus (RANSAC) algorithm. The initial probability estimation of test samples is accomplished by using a Gaussian distribution. And the probabilities are updated with each iteration, which is used to establish the sampling criteria of the algorithm. Thereby, the algorithm's efficiency is enhanced. Furthermore, the effectiveness of this method is evaluated through simulation experiments, and the maximum deviation between the approximated and ideal values of relative time delay is -0.038 ns.