150 / 1971-01-01 00:00:00

A 2gsps 8bit Pipelined Track-and-hold Amplifier In 90nm Cmos Technology

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A 2GSps, 8bit pipelined track-and-hold amplifier (THA) was designed for folding and interpolation (F&I) ADC in TSMC 90nm CMOS technology. Bootstrapped switch was adopted instead of MOS switch to overcome the bandwidth and linearity issues. A second-stage THA was design to track and hold the signal from the regular single stage THA, thus improve its performance. Post simulation results prove that the THA achieves Spurious Free Dynamic range (SFDR) of 64.3dB and Signal to Noise and Distortion Ratio (SNDR) of 61.5dB at Nyquist sampling rate. Post simulation results of the F&I ADC demonstrate that the THA is suitable for the application.