活动简介
Austrochip is an annual meeting and platform to present the latest activities in the field of microelectronics and integrated circuits in Austria and neighboring countries. The workshop is a forum for discussion and contact between academia and industry. Austrochip 2017 is the 25th edition organized by the Institute for Integrated Circuits (IIC) of Johannes Kepler University Linz.
Since 1991, Austrochip is an annual meeting/platform to present the latest activities in the field of microelectronics and integrated circuits in Austria and neighbouring countries. The conference is a forum for discussion and contact between academia and industry. Austrochip deals with the design of analogue, digital, and mixed-signal integrated circuits and systems. Submissions of original research papers cover, but are not limited to, the following topics: Analog, mixed-signal, and RF integrated circuits, digital circuits, filters, DSPs, asynchronous designs, FPGA design and reconfigurable hardware, design methodology, system-level design, gigascale circuits, network-on-chip, embedded systems, low-power designs, RF systems, security aspects, verification and testing, signal integrity, device modelling, timing analysis, reliability simulation, emerging technologies, nano CMOS process, sub-threshold circuits.
征稿信息
重要日期
Submissions from academia as well as industry are welcome. Especially, PhD-Students are invited to present their ongoing work related to topics of Austrochip, but also excellent MSc-Theses will be considered.
征稿范围
Austrochip deals with the design of analog, digital, and mixed-signal integrated circuits and systems. Submissions of original research papers to the workshop should cover, but are not limited to, the following topics:
- Analog, mixed-signal, and RF integrated circuits
- Digital circuits, filters, DSPs, asynchronous designs
- FPGA design and reconfigurable hardware
- Design methodology, system-level design, gigascale circuits, network-on-chip
- Embedded systems, low-power designs, RF systems, security aspects
- Verification and testing, signal integrity, device modelling, timing analysis, reliability simulation, EMC, ESD
- Emerging technologies, nano CMOS process, sub-threshold circuits, sensors, organic and biomedical electronics
- Case studies and prototyping
作者指南
All submissions will be blind-reviewed. The papers that will be accepted by the program committee will be made available in electronic form at the conference. The proceedings will be created by the IEEE Computer Society Conference Publishing Services (IEEE CPS) and we plan to publish all accepted papers that are written in English and that fulfill the IEEE requirements at IEEE Xplore. The papers will then be indexed by well-known major indexing services like DBLP, ACM, Google, etc. (for details see a list of IEEE indexing agreements here). Submission implies willingness of at least one of the authors to register and present the paper at the conference.
Papers should not exceed 6 pages (including bibliography and appendix). Accepted file formats are PDF, MS Word. Submitted papers must be anonymous and can be written in English or German (note that only submissions in English can be considered for a publication at IEEE Xplore). The papers must follow the guidelines of the IEEE style.
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重要日期
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10月12日
2017
会议日期
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06月03日 2017
初稿截稿日期
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08月28日 2017
初稿录用通知日期
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09月11日 2017
终稿截稿日期
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10月12日 2017
注册截止日期
主办单位
联系方式
- Timm Ostermann
- ti******@jku.at
- +43********
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