The scaling of silicon MOSFETs, DRAM, and Flash memory has already required the use for finFETS, high-k dielectrics and SiGe stressors and there is active research in tunnelFETs. Further progress requires new materials and new device design engineering. For future MOSFET logic devices and power MOSFETs, novel channel materials such as broken-gap semiconductor heterostructures, transition metal dichalcogenides (TMD), and related materials are being investigated along with novel gates such as ferroelectrics and spin-based materials. Future non-volatile memory includes phase change memory with multistate gates, ferroelectrics, and 3D structures. This symposium will emphasize not only the advances in materials but also the new device structures that are required for the new materials to provide substantial improvements in device performance.
Unconventional transistors, switch/memory designs including tunnel FETs, TMD heterostructure FETs, spinFETS, 3D transistors
High-k dielectrics, oxide stacks, and metal gates for SiGe, Ge, III-V, GaN, TMD, graphene, DRAM and flash memory
Engineering of band offsets, dielectric behavior, and work function control
Gate-stack materials and interfaces for future switches and memory
Materials and mechanisms of Resistive RAM
Fabrication techniques for three dimensional devices
Integration techniques for low dimensional materials into 3D devices
Surface pretreatments and cleaning of non-Si channel materials
Electrical reliability of nanoscale devices and its modeling
High conductivity sources and drains for future MOSFETS
Negative capacitance and ferroelectric materials and devices
04月17日
2017
04月21日
2017
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