EUV Lithography continues to make progress towards production deployment, however DUV multi-patterning remains the sole advanced lithography solution in use today. We must continue to improve optical mask technology to support the extension of multi-patterning to triple and quadruple patterning into the sub-10nm nodes. There is a strong push for more focus on infrastructure needs for mask manufacturing, particularly for EUV masks including actinic solutions for inspection and metrology, and advanced 2D characterization techniques to support optical lithography solutions. New resists are now being developed concurrently with blanks for optimum performance; EUV blanks are in the critical path.
What changes should mask makers expect that allow the industry to stay on Moore’s Law and the cost roadmap? Is a paradigm shift ahead of us?
As mask makers we must continue to focus on providing mask solutions for EUV, multiple patterning, complex OPC’ed masks, NIL, SMO, and the other lithography solutions in an environment in which continuously tightening error budgets increase the burden the mask manufacturing infrastructure must bear.
The 36th Photomask Symposium, organized by SPIE and BACUS, the International Photomask Technical Group of SPIE, provides the forum to present these technology advances and their impacts on semiconductor lithography.
Suggested topics for submissions include, but are not limited to:
Mask Making
mask data preparation
substrates and materials
patterning tools and processes
resist and resist processing
etch techniques
metrology
inspection
repair
cleaning, contamination, and haze
mask process correction.
EUV Mask Technologies
mask making
equipment infrastructure
blank and resist
high NA: anamorphic impacts on mask
actinic and non-actinic characterization strategies
optical implementation
source/mask optimization
pellicles
multipatterning, optical and EUV hybrid.
Emerging Mask Technologies
nanoimprint mask making and applications
multibeam mask writers
alternative mask technologies
grey-scale masks
direct-write, maskless lithography
inverse lithography and pixelated mask technology.
Computational Lithography
edge placement error
source/mask optimization
advanced data preparation techniques
novel jobdeck requirements for new write formats
resolution enhancement techniques and OPC
design for manufacturability
simulation and modeling.
Mask Application
patterned media
flat panel display
MEMS patterning
silicon photonics.
Mask Business
mask manufacturing management
mask management in wafer fabs
business aspects of masks
infrastructure challenges.
Special Sessions
Student only competing for Photronics Award and ZIESS Award.
Panel Discussion.
Masks for alternate lithography applications.
09月12日
2016
09月14日
2016
注册截止日期
2017年09月11日 美国 Monterey
第37届光掩模技术大会
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